1. Technical Field
The present invention generally relates to contacts for semiconductor devices. More particularly, the present invention relates to contact structures and the use of confined epitaxial material for active regions of semiconductor devices.
2. Background Information
As overall semiconductor device size continues to shrink, the space allotted to each feature gets smaller. For example, non-planar transistors using epitaxial semiconductor material for the source and drain would suffer inadequate size, in light of the vulnerability of the epitaxial material to fabrication processes (e.g., contact etches) and the resulting high resistance. In addition, the inadequate size of the epitaxial material leaves inadequate area for silicide, and results in a contact resistivity that is too high. Further, inadequately sized epitaxial material cannot simply be addressed by growing more epitaxial material, as that can lead to various device short failures, due to the narrow distance between devices and lateral growth of the epitaxial material.
Thus, a need exists for improvements to source and drain contact resistivity.